On-chip procedural content generation with the GPU

Abstract

In video games, virtual reality and other real-time graphic applications where the Graphics Processing Unit (GPU) plays a central role, performance is of the essence. Platforms such as games consoles have hardware that is fixed for several years, yet new competitive products have to ship regularly. Developers are thus constantly looking for techniques to better use those platforms and push hardware closer to their theoretical limits. With ultra high resolution display now a commodity, rendering dense and rich details has never been so demanding for existing hardware. In this thesis, we develop a general algorithm for rendering massive amounts of procedurally or analytically generated objects, by leveraging GPU capabilities such as hardware tessellation, fast ALU and high-bandwidth local memories in order to maximize geometry throughput. The proposed techniques minimize external bandwidth and memory usage by generating and keeping most data on-chip without costly round trips to main memory. At the instantiation level, we expose an explicit method for user placement of objects which, unlike ubiquitous procedural distribution techniques provides better control over distribution and placement and helps maintaining the much-needed distinctive aesthetics that is required in current crowded markets. To sustain this explicit placement method, a GPU-friendly compression technique is developed to keep memory footprint low and allow explicit massive instantiation. For the sake of completeness, we compare the performance of our solution to existing techniques such as GPU instancing, geometry shaders and brute force rendering. The comparative analysis is performed on various hardware platforms using sample data. Finally, a series of use cases is provided to demonstrate contextual usage of the proposed algorithm and methods.

Date of Award	24 Jun 2019
Original language	English
Awarding Institution	University of Namur
Supervisor	Laurent Schumacher (Supervisor)