TY - JOUR
T1 - Fabrication and room-temperature single-charging behavior of self-aligned single-dot memory devices
AU - Tang, X.
AU - Reckinger, N.
AU - Bayot, V.
AU - Krzeminski, C.
AU - Dubois, E.
AU - Villaret, A.
AU - Bensahel, D.-C.
PY - 2006/11/1
Y1 - 2006/11/1
N2 - Self-aligned single-dot memory devices and arrays were fabricated based on arsenic-assisted etching and oxidation effects. The resulting device has a floating gate of about 5-10 nm, presenting single-electron memory operation at room temperature. In order to realize the final single-electron memory circuit, this paper investigates process repeatability, device uniformity in single-dot memory arrays, device scalability, and process transferability to an industrial application.
AB - Self-aligned single-dot memory devices and arrays were fabricated based on arsenic-assisted etching and oxidation effects. The resulting device has a floating gate of about 5-10 nm, presenting single-electron memory operation at room temperature. In order to realize the final single-electron memory circuit, this paper investigates process repeatability, device uniformity in single-dot memory arrays, device scalability, and process transferability to an industrial application.
UR - http://www.scopus.com/inward/record.url?scp=33751527947&partnerID=8YFLogxK
U2 - 10.1109/TNANO.2006.883481
DO - 10.1109/TNANO.2006.883481
M3 - Article
AN - SCOPUS:33751527947
SN - 1536-125X
VL - 5
SP - 649
EP - 655
JO - IEEE Transactions on Nanotechnology
JF - IEEE Transactions on Nanotechnology
IS - 6
ER -
